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| For Audio Equipment MN6460A A/D Converter for Digital Audio Equipment Overview The MN6460A is a 16-bit CMOS analog-to-digital converter designed especially for PCM digital audio equipment. It features a built-in digital filter. It uses noise shaping to convert an analog signal to a 16-bit digital signal. Incorporating digital filter permits simplification of the analog filter that normally precedes the A/D converter, thus greatly reducing the power consumption of the overall A/D conversion system. Pin Assignment Features Analog and digital-mixed CMOS LSI A/D conversion using noise shaping 64-fold oversampling Built-in digital filter Sample and hold circuit is unnecessary Serial output using two's complement code Built-in offset compensation circuit Built-in overflow limiter Single 5-volt power supply (when V REF =1.5 V and AG=2.5 V) DVDD LR-POL I-E LR-CLK B-CLK CLR OFCLR N.C. N.C. N.C. N.C. N.C. N.C. N.C. EXCLK CVSS CVDD N.C. N.C. AVSS AVDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 DVSS TEST N.C. DOUT N.C. NSUB N.C. N.C. N.C. N.C. TCLK N.C. N.C. N.C. AMPBIAS N.C. AVSS AVDD AIN AG VREF (TOP VIEW) SSOP042-P-0450 Applications DAT players and other digital audio equipment MN6460A Block Diagram For Auido Equipment DSQ:1bit Delta Sigma Quantizer 1st DSQ (+) 24 x 1/2 1st DSQ (-) x 1/2 2nd DSQ - 3rd DSQ + AIN Summing logic A/D converter EXCLK 15 Clock Generator FIR 1 Comb-filter FIR 2 Low-pass-filter 6 Digital filter CLR OFFSET Canceller 7 2 P/S Converter 3 4 5 39 DOUT OFCLR LR-CLK LR-POL B-CLK I-E For Audio Equipment Pin Descriptions Pin No. 1 2 3 4 Symbol DVDD LR-POL I-E LR-CLK Function Description Power supply pin for digital circuits (+5 V) Channel selection pin for stereo operation using two chips. "H" level: right channel. "L" level: left channel. MN6460A Format selection pin. "L" level: signal processing LSI format. "H" level: I2S format. LRCLK input pin (for stereo operation) If LR-POL is at "H" level, "H" level: right channel data output. "L" level, high-impedance state. If LR-POL is at "L" level, "H" level: high-impedance state. "L" level, left channel data output. 5 6 B-CLK CLR Bit transfer command input (At falling edge signal, a bit transfered) Clear pin. Active high. Driving this pin at "H" level clears internal data. Always this internal data is cleared by feeding a positive pulse to this pin after applying the power. 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 OFCLR N.C. N.C. N.C. N.C. N.C. N.C. N.C. EXCLK CV SS CV DD N.C. N.C. AVSS AVDD VREF AG AIN AVDD AVSS N.C. AMPBIAS N.C. N.C. N.C. Driving this pin at "L" level enables the offset clear circuit. No connection (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) 512 fs input pin Ground pin for digital circuits Power supply pin for digital circuits (+5 V) No connection (Leave this pin open.) No connection (Leave this pin open.) Ground pin for analog circuits Power supply pin for analog circuits (+5 V) Analog circuit reference voltage input pin (+1.5 V) Analog ground input pin (+2.5 V) Analog input pin Power supply pin for analog circuits (+5 V) Ground pin for analog circuits No connection (Leave this pin open.) Bias voltage adjustment pin for operational amplifier (Keep this at the same voltage as the AG pin.) No connection (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) MN6460A Pin Descriptions (continued) Pin No. 32 33 34 35 36 37 38 39 40 41 42 Symbol TCLK N.C. N.C. N.C. N.C. NSUB N.C. DOUT N.C. TEST DVSS Function Description LSI test clock output pin. (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) No connection (Leave this pin open.) Connect this pin to AVDD . No connection (Leave this pin open.) Serial output pin. Two's complement. MSB first. No connection (Leave this pin open.) LSI test pin. (Connect this pin to DVDD .) Ground pin for digital circuits For Auido Equipment Electrical Characteristics Conversion Characteristics DV DD=5.0V, AVDD=5.0V, V AG=2.5V, V REF=1.5V, fEXCLK=24.576MHz, Ta=25C Parameter Signal-to-noise ratio Dynamic range Total harmonic distortion Symbol S/N D.R. THD+N Test Condition EIAJ (1kHz) EIAJ (1KHZ) EIAJ (1kHz) min 85 85 typ 90 90 0.005 max Unit dB dB 0.010 % Specifications for DC Offset An A/D converter usually does not produce digital zero output from analog zero input because the operational amplifier inside has an offset. The MN6460A, however, has circuitry for correcting this. The shipping inspection enables this offset correction circuit and confirms that the DC offset is within the lower four bits. Parameter DC offset Symbol Test Condition OFCLR="H" OFCLR="L" min typ max 20 0.6 Unit mV mV For Audio Equipment Application Circuit Example 256Fs LRCK DATA BCK MN6460A CLR 10k 0.1F D1 R1 C5 5V 16 15 14 13 12 11 10 9 4.7F + 4.7F 16 + 15 14 13 12 11 10 9 4.7F + 14 13 12 11 10 98 4.7F C16 HC123 1234 5 678 10F C7 C15 HC161.counter 1 23 45 678 C22 HC74.D-FF 12345 67 256Fs 512Fs 100F 4.7F C1 - + 10k C15 R7 C8 GND SW1 + + + C16 HC161.counter 1 23 45 6 78 C23 XTAL.512Fs 12345 67 R18 + EXCLK-L HC32 1234 + HC32 1234 C24 + 56 7 5 6 7 4.7F C3 D.GND 100F C2 - + LR-CLK B-CLK CLR OFCLR D.VDD 4.7F C15 4.7F C16 10F SW C12 4.7F EXCLK-R + EXCLK-R MN6460A 10k 10k MN6460A EXCLK-L VR3 R11 C23 0.1F 10F C3 + 10F C26 + 4.7F C41 + + 100F + C19 - + + A.GND + 4.7F C41 1000pF C14 + C17 4.7F C41 C5 4.7F 4.7F C16 100F 22F 4.7F C18 C13 C13 C5 3.3F R15 10k + - + C41 C13 + + R14 + VR4 R14 C36 10k R12 10k1k R5 R3 100pF 5 6 7 8 VR1 C19 A.GND -12V 3 2 1 C29 33F C27 22F 4 + R12 33F 12V + C28 - C31 + - HAF0614.LPF + - C38 C33 - 1.2k R10 R22 6 7 1.2k 4 100F 5 100F 4 5 6 7 1.2k 1.2k Ain(R) Ain(L) R21 R9 HAF0614.LPF 1 2 3 100F 100F + C32 1 2 3 100pF 1k R5 R17 R4 10k 22F 10k 1k 10k 10k1k 10k 22F 22F C5 100F 4.7F 3.3F + + C30 A.VDD C15 C11 C34 + 100F - R8 4.7k 22k R7 10k + R28 4.7k 22k R13 + VR5 0.1F VR2 C37 0.1F 10k 34 1 DVDD DVSS 42 2 LR-POL TEST 41 3 I-E N.C. 40 4 LR-CLK DOUT 39 5 B-CLK N.C. 38 6 CLR NSUB 37 7 OFCLR N.C. 36 N.C. 35 8 N.C. N.C. 34 9 N.C. N.C. 33 10 N.C. 11 N.C.(TP0) TCLK 32 N.C. 31 12 N.C.(TP1) N.C. 30 13 N.C.(TP2) N.C. 29 14 N.C.(TP3) 15 EXCLK AMPBIAS 28 N.C. 27 16 CVSS AVSS 26 17 CVDD AVDD 25 18 N.C. AIN 24 19 N.C. AG 23 20 AVSS VREF 22 21 AVDD 4.7F 4.7F + C41 DVSS 42 1 DVDD TEST 41 2 LR-POL N.C. 40 3 I-E DOUT 39 4 LR-CLK N.C. 38 5 B-CLK NSUB 37 6 CLR 7 OFCLR N.C. 36 N.C. 35 8 N.C. N.C. 9 N.C. N.C. 33 10 N.C. TCLK 32 11 N.C.(TP0) N.C. 31 12 N.C.(TP1) N.C. 30 13 N.C.(TP2) N.C. 29 14 N.C.(TP3) 15 EXCLK AMPBIAS 28 N.C. 27 16 CVSS AVSS 26 17 CVDD AVDD 25 18 N.C. AIN 24 19 N.C. AG 23 20 AVSS VREF 22 21 AVDD + + - + + + + + + 4.7F 16 15 14 13 12 11 10 9 14 13 12 11 10 9 8 4.7F 20 19 18 17 C44 16 15 14 13 12 11 HC244 12 3 4 56 7 8 9 10 4.7F 330 14 13 12 11 10 9 8 14 13 12 11 10 9 8 4.7k 10F C33 R16 C41 R23 10k 10k VR5 C43 4.7F C41 0.1F C42 - 100F C13 1000pF MN6460A Package Dimensions (Unit: mm) SSOP042-P-0450 For Auido Equipment 21.250.20 42 22 1.00.2 11.50.3 9.50.2 0.15 -0.05 +0.10 1 21 2.00.2 2.4max. 0 to 10 0.3min. (0.6) 1.0 0.350.10 0.10.1 SEATING PLANE |
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